PhD & Postdoc
Wei-Chen Lin
Semiconductor Devices · National Taiwan University
Wei-Chen characterizes failure mechanisms in next-generation transistor architectures and builds predictive reliability models. His TCAD-to-fab skill set directly serves a leading-edge semiconductor foundry.
8 Publications
6 Skills
Dr. Chenming Hu Advisor
Thesis Topic
Gate-all-around nanosheet transistor reliability at sub-2nm nodes
Skills
TCAD Simulation Device Characterization Cleanroom Processing Python Failure Analysis SPICE Modeling
Transition Signals
Internship at TSMC
Filed first patent on a reliability test structure
Recruited via semiconductor alumni network
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